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EnerMan

ENERgy-efficient manufacturing system MANagement
https://enerman-h2020.eu/

ENERMAN envisions the factory as a living organism that can manage its energy consumption in an autonomous way. It will create an Energy sustainability management framework collecting data from the factory and holistically process them to create dedicated energy sustainability metrics. These values will be used to predict energy trends using industrial processes, equipment and energy cost models. ENERMAN will deliver an autonomous, intelligent decision support engine that will evaluate the predicted trends and access if they match predefined energy consumption sustainability KPIs. If the KPIs are not met, ENERMAN will suggest and implement changes in energy affected production lines control processes: an energy aware flexible control loop on various factory processes will be deployed. The ENERMAN administrators will be able to use the above mechanisms in order to identify how future changes in the production lines can impact energy sustainability using the ENERMAN prediction engine (based on digital twins) to visualize possible sustainability results when in-factory changes are made in equipment, production line. The ENERMAN digital twin will predict the economic cost of the consumed energy based on the collected and predicted Energy Peak load tariff, Renewable Energy System self-production, the variations in demand response, possible virtual generation and prosumer aggregation. Finally, ENERMAN considers the operators actions within the production chain as part of a factory’s energy fingerprint since their activity within the factory impacts the various production lines. In ENERMAN, we include a training mechanism with suggested personnel good practices for energy sustainability improvement through the production lines. Current and predicted energy consumption/sustainability trends on specific assets of the factory are collected and visualized in a Virtual, eXtended reality model of the factory to enhance the situational energy awareness of the factory personnel.

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DEMONSTRATE

DEMonstration Of Novel fuSelage sTructuRAl inTEgrity

The objective of DEMONSTRATE, aligned to the ‘Innovative light metallic and thermoplastic airframe section full scale testing’ (JTI-CS2-2020-CFP11-AIR-03-10) topic is the full-scale testing of three airframe section demonstrators, two metallic and a thermoplastic fuselage panel with an integrated stiffening structure, to demonstrate their structural integrity, supported by advanced simulation methodologies correlated with experimental data. A number of enabling technologies have been planned to be developed and matured within the duration of the project, which will result to the realisation of an efficient, reliable and cost-effective test bench suitable for the full-scale testing of curved aeronautical panels, including: the development of a virtual testing methodology for the definition of the stiffened panels boundary and loading conditions; the further development of an innovative, cost-efficient, easily adaptable fuselage panel full-scale test bench concept; the development and/or adaptation of a wide range of novel measurement techniques; the development and application of advanced simulation methodologies. The developed test bench will be used for the execution of static tests on advanced metallic and thermoplastic curved integrally stiffened full-scale panels, representative of a business jet fuselage structure and the execution of an endurance test on an integrally stiffened 4th generation Al-Li curved panel.

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SUSTAINABLE

Stop running, stop and start using our knowledge to be reachable

SUSTAINABLE strategic goal is to test and validate new edge artificial intelligence (AI) systems as a Decision Support System, on sound economic and technical basis, for suitable precision agriculture management procedures according to the specific climate, geographical and environment conditions. Having a novel tool to face adversities in agriculture, especially in developing countries, will produce positive effects in the global economy (maintaining the cost of agricultural products), will reduce the scale of economic emigration (often due to one or several years of low crop) and will help distribute more evenly richness across the planet. The strength of this project is the multidisciplinary integration of competences together with the validation of project result in a real environment.

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HEAP

A Highly Efficient Adaptive Multi-processor Framework
https://cordis.europa.eu/project/rcn/93254/factsheet/en
Making modern embedded systems faster and less power hungry by parallelization
 
Writing parallel programs has traditionally been considered a difficult task, even when parallelism is taken into account from the beginning. Moreover there is an urgent need to parallelize the massive amounts of legacy sequential code so as to increase its performance on processors and systems that refocus from single-thread acceleration to increasing the overall throughput. At the same time, memory (in particular cache) performance is essential to achieve the full gain from a parallelized application. However, while processor architecture tends to be relatively standard across applications within a domain, huge performance and power improvements can be achieved by tailoring the cache architecture to the application at hand, and not just to an entire domain.
 
The HEAP project faces these challenges directly, by developing:
  1. An innovative toolset that helps software developers profile and parallelize existing sequential implementations by exploiting top-level pipeline-style parallelism. 
  2. A highly configurable cache architecture that can be tailored to an application by using the same profiling data as those that were used for parallelization, in order to fully exploit the available computing power.
When compared with the existing single-cache coherency architectures and the existing, mainly manual, parallelizing approaches, the end-product of HEAP (i.e. the novel architecture combined with the innovative toolset) is expected to: a) reduce the time for parallelizing sequential applications by 20% b) reduce the energy consumed for the memory coherency operations by 20% and c) increase the performance of the memory coherency systems by 20%.
 
The HEAP framework directly addresses two distinct multi-billion application areas (a) High Performance Computing and (b) Multi-core Embedded Systems. In both fields it is expected that the impact of HEAP will be significant worldwide; this claim is supported by the fact that the HEAP results will be internally exploited by two of the largest semiconductor companies in the world  (STM and Thales), as well as a large scale Information Systems Provider (Singular Logic) and an SME (Synelixis). Moreover, the commercial version of the toolset will be exploited by two additional software tool-providers (ACE  and Compaan Design). Moreover, HEAP-based multi-core systems are expected to help closing the digital gap in Europe, while mainly the open-source version of the toolset will reinforce European competitiveness in the areas of Parallelizing toolsets and the new innovative platforms will help extending existing service offerings to the EU citizens.
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HEAP

A Highly Efficient Adaptive Multi-processor Framework
https://cordis.europa.eu/project/rcn/93254/factsheet/en
Making modern embedded systems faster and less power hungry by parallelization
 
Writing parallel programs has traditionally been considered a difficult task, even when parallelism is taken into account from the beginning. Moreover there is an urgent need to parallelize the massive amounts of legacy sequential code so as to increase its performance on processors and systems that refocus from single-thread acceleration to increasing the overall throughput. At the same time, memory (in particular cache) performance is essential to achieve the full gain from a parallelized application. However, while processor architecture tends to be relatively standard across applications within a domain, huge performance and power improvements can be achieved by tailoring the cache architecture to the application at hand, and not just to an entire domain.
 
The HEAP project faces these challenges directly, by developing:
  1. An innovative toolset that helps software developers profile and parallelize existing sequential implementations by exploiting top-level pipeline-style parallelism. 
  2. A highly configurable cache architecture that can be tailored to an application by using the same profiling data as those that were used for parallelization, in order to fully exploit the available computing power.
When compared with the existing single-cache coherency architectures and the existing, mainly manual, parallelizing approaches, the end-product of HEAP (i.e. the novel architecture combined with the innovative toolset) is expected to: a) reduce the time for parallelizing sequential applications by 20% b) reduce the energy consumed for the memory coherency operations by 20% and c) increase the performance of the memory coherency systems by 20%.
 
The HEAP framework directly addresses two distinct multi-billion application areas (a) High Performance Computing and (b) Multi-core Embedded Systems. In both fields it is expected that the impact of HEAP will be significant worldwide; this claim is supported by the fact that the HEAP results will be internally exploited by two of the largest semiconductor companies in the world  (STM and Thales), as well as a large scale Information Systems Provider (Singular Logic) and an SME (Synelixis). Moreover, the commercial version of the toolset will be exploited by two additional software tool-providers (ACE  and Compaan Design). Moreover, HEAP-based multi-core systems are expected to help closing the digital gap in Europe, while mainly the open-source version of the toolset will reinforce European competitiveness in the areas of Parallelizing toolsets and the new innovative platforms will help extending existing service offerings to the EU citizens.
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ERA

Embedded Reconfigurable Architectures
https://cordis.europa.eu/project/rcn/93755/factsheet/en
To develop an embedded system platform that dynamically adapt itself to the applications. The platform will be open-source: both the industry and academia can use it for fast design-space prototyping.
 
The design of embedded systems such as mobile smartphones becomes increasingly more complex as multi-core processors are needed to achieve the required functionalities. This complexity has triggered the trend to move away from utilizing dedicated hardware designs to more general-purpose platforms. However, different applications such as the telephone and the camera functions in the mobile smartphone have different characteristics and requirements, making the efficient support of all these characteristics nearly impossible in the scope of a single fixed platform, despite its programmability. Consequently, we are observing the emergence of many-core chips, i.e., containing multiple but differently sized/performing/power-consuming processor cores. An example is the Tegra 3-chip from NVIDIA containing several high-performance cores and a low-performance/low-power processor core. Still, each core is not tuned efficiently for different applications.
 
The efficiency problem is addressed by the ERA project, which goals is to develop a platform that can dynamically adapt itself to the applications (characteristics and requirements) while taking into account performance and power constraints within its operating environment. We expect an increased performance of selected applications by 25% with the same energy consumption or reduced energy consumption by 30% with the same performance. Moreover, the ERA platform will allow for further efficient utilization of on-chip resources as the platform itself performs self-optimization and without much effort, the industry can use the platform to perform quick design-space explorations.
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CHIRON

Cyclic and person-centric Health management : Integrated appRoach for hOme, mobile and clinical eNvironments
The CHIRON Project intends to combine state-of-the art technologies and innovative solutions into an integrated framework designed for an effective and person-centric health management along the complete care cycle. In this vision, a. CHIRON will address and harmonize the needs and interests of all the three main beneficiaries of the healthcare process, i.e., the citizens using the services, the medical professionals and the whole community; b. CHIRON will position the citizens at the core of the whole healthcare cycle by considering them as persons with specificities and identities and will empower them to manage their own health; c. CHIRON will enlarge the boundaries of healthcare by fostering a seamless integration of clinical setting, at home setting and mobile setting in a concept of a continuum of care; d. CHIRON will speed up the move from treatment of acute episodes to prevention; e. CHIRON will provide the physicians with extensive support for treatment monitoring and management, timely decisions and appropriate actions in both the clinical and home environments; More specifically CHIRON intends: a. to design  according to this integrated approach a reference architecture for personal healthcare which will ensure the interoperability between heterogeneous devices and services, a reliable and secure patient data management and a seamless integration with the clinical workflow; b. to develop sophisticated solutions of complex data analysis, feature extraction and knowledge management; c. to introduce beyond state of the art solutions in various specific parts of the system; d. to provide new, advanced tools for real time processing, computer-aided analysis and accurate visualization of medical images; and e. to validate the result of the research and assess the proposed solutions in relation to their technical and clinical aspects and from a socio-economic perspective. The CHIRON system will provide powerful supporting ICT tools and at the same time it will ensure that the patients and the doctors remain the protagonists of the healthcare process that has been designed around them.
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nSHIELD

new embedded Systems arcHItecturE for multi-Layer Dependable solutions
https://artemis-ia.eu/project/34-nshield.html
nSHIELD is the architectural framework project for security, privacy and dependability (SPD) in Embedded Systems (ES). The project will develop new built-in SPD functionalities and will demonstrate the modularity and the composability of them in four different strategic scenarios: Railways Security, Voice/Face Recognition, Dependable Avionic Systems and Social Mobility and Networking.
 
The nSHIELD complaint tool-set, with the possibility to guarantee required SPD level by using integrated metrics, will enable not only development and verification time the certification process expenses to be reduced. Build-in protocol verifica¬tion and configuration mechanisms in the integrated tool set will help to predict the desired efficacy of the embedded system under development.
 
nSHIELD project will help to provide early validation methodology focusing on SPD aspects and taking into account the variability of embedded system families addressing important topics of the Artemis Strategic Research Agenda within the ‘Design Methods and Tools‘ area of research:
  • methods and tools for simulation,
  • automatic validation and testing,
  • verification and validation methods and tools for developing embedded systems product lines.
Moreover, the provision of early validation techniques adapted to SPD will further contribute to improving the quality of end products and reducing time to market and costs.
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WSN-DPCM

Wireless Sensor Network Development, Planning, Commissioning, and Maintenance
http://www.wsn-dpcm.eu/
WSN-DPCM is a cooperation project of several technical universities and companies from Spain, Italy and Greece.
 
The project is funded by the ARTEMIS Joint Undertaking (the European technology platform representing the field of advanced research and technology for embedded intelligence and systems), national authorities and European partner companies. The total volumen of the project is 3.4 million euros.
 
WSN-DPCM will address large-scale application of Wireless Sensor Networks (WSN) by developing an integrated patform for smart environments comprising a middleware for heterogeneous wireless technologies, an integrated engineering tool for quick system development, a planning tool and a commissioning & maintenance tool.
 
Two demonstrators will be built to evaluate the impact of the middleware and tools.
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SOLDER

Spectrum OverLay through aggregation of heterogeneous DispERsed Bands
Wireless access is becoming the dominant way of connecting to the Internet due to the high data rates that several radio access technologies (RATs) provide. Such success is a result of several advances in wireless communications over the last two decades. A key enabling technique which promises further improvement in data rates is carrier aggregation (CA). Intra-band and inter-band carrier aggregation, in a continuous or a non-continuous fashion, have been proposed within the 3GPP standardization body for LTE-Advanced (LTE-A). Cross-carrier scheduling is also specified through dynamic scheduling on different component carriers. LTE-A has been specified to support all types of CA using several transmission bandwidths for all band combinations. A future enhancement would be the assumption of CA operating over heterogeneous networks (HetNets) and heterogeneous radio access technologies (h-RATs), considering the fact that both HetNets and h-RATs are key aspects of beyond 4G communications. However, CA has not been designed for HetNets and h-RATs so far. Aiming to serve beyond 4G communications, we envisage a spectrum overlay technology that will be able to manage aggregated heterogeneous bands (HetBands) efficiently, which are licensed to HetNets and h-RATs or even based on unlicensed or opportunistic spectrum access, in order to deliver higher data rates to future multi-standard handset devices in a flexible way based on cognitive radio technology. To be specific, we will investigate and design advanced physical and upper layer techniques, such as diversity, link adaptation and radio resource management, which will be able to handle the aggregation of non-continuous and dispersed bands (i.e., HetBands) extending thereby the 3GPP functionality. More specifically, frequency and subcarrier diversity, multi-channel link adaptation and multidimensional radio resource and inter-carrier interference management will be developed and demonstrated over such a new heterogeneous and wideband fading environment. We will also investigate and design radio impairments mitigation techniques, such as reduction of power fluctuation and linearization. To this end, proof of concept prototypes will be developed to demonstrate and validate the soundness of the innovative concepts proposed by SOLDER.
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